BlockBeats News, July 3rd, Semiconductor and AI independent research firm SemiAnalysis published an article stating that JEDEC announced the SPHBM4 new standard last week, namely the Standard Packaging High Bandwidth Memory JESD330-4. SPHBM4 uses the same DRAM stack as HBM4, but with a different buffer chip, aiming to achieve HBM assembly in standard packaging and alleviate the AI advanced packaging bottleneck. The idea behind SPHBM4 is to maintain HBM4's performance while significantly reducing reliance on expensive and supply-constrained advanced packaging.

SPHBM4 is a significant boon for the substrate industry. On the one hand, traditional HBM must be in close proximity to the GPU because wide parallel signals quickly attenuate with distance; whereas SPHBM4 uses high-speed serial channels, allowing the memory to be placed up to 20 millimeters away. With the increase in package size, the total substrate material area required per chip will significantly increase. On the other hand, 32 Gbps signals passing directly through an organic substrate will increase electrical complexity. SPHBM4 will drive the use of high-end high-density ABF substrates with 20 to 28 layers or more, as well as future glass substrates.

It indicates that SPHBM4 will shift the AI chip's complex engineering burden from the "silicon interposer + ABF substrate" combination to oversized, high-layer ABF substrates, and even accelerate the adoption of glass substrates. "The substrate prosperity is just beginning."